/* ** ################################################################### ** Filename : 24lc256.h ** DataSheet: Microchip 24AA256/24LC256/24FC256 256K IIC Serial EEPROM ** REV: 2004 ** ** ** Compiler : CodeWarrior compiler ** Date/Time : 03.11.2008 ** Abstract : ** This header implements structures and addresses for the 24LC256 ** EPROM ** ** Omair Khan ** University of Southern California ** www.omair-khan.com ** ** ** Revisions: ** none ** ** ################################################################### */ #ifndef _24LC256_H #define _24LC256_H /* Types definition */ typedef unsigned char byte; typedef unsigned int word; typedef unsigned long dword; typedef unsigned long dlong[2]; #pragma MESSAGE DISABLE C1106 /* WARNING C1106: Non-standard bitfield type */ /** LCD Built in HEX values **/ #define EPROM_IIC_ADDR 0xA0 #define EPROM_START_ADDR 0x0000 /*** Text Layer Addr ***/ typedef union { word Word; struct { byte ADDRL0 :1; /* ADDR Bit 0 */ byte ADDRL1 :1; /* ADDR Bit 1 */ byte ADDRL2 :1; /* ADDR Bit 2 */ byte ADDRL3 :1; /* ADDR Bit 3 */ byte ADDRL4 :1; /* ADDR Bit 4 */ byte ADDRL5 :1; /* ADDR Bit 5 */ byte ADDRL6 :1; /* ADDR Bit 6 */ byte ADDRL7 :1; /* ADDR Bit 7 */ byte ADDRH0 :1; /* ADDR Bit 8 */ byte ADDRH1 :1; /* ADDR Bit 9 */ byte ADDRH2 :1; /* ADDR Bit 10 */ byte ADDRH3 :1; /* ADDR Bit 11 */ byte ADDRH4 :1; /* ADDR Bit 12 */ byte ADDRH5 :1; /* ADDR Bit 13 */ byte ADDRH6 :1; /* ADDR Bit 14 */ byte ADDRH7 :1; /* ADDR Bit 15 */ } Bits; struct { byte ADDRL :8; byte ADDRH :8; } MergedBits; } EPROM_ADDRSTR; EPROM_ADDRSTR _EPROM_ADDR; #define EPROM_ADDR _EPROM_ADDR.Word #define EPROM_ADDR_ADDRH _EPROM_ADDR.MergedBits.ADDRH #define EPROM_ADDR_ADDRL _EPROM_ADDR.MergedBits.ADDRL #define EPROM_ADDR_ADDRH7 _EPROM_ADDR.Bits.ADDRH7 #define EPROM_ADDR_ADDRH6 _EPROM_ADDR.Bits.ADDRH6 #define EPROM_ADDR_ADDRH5 _EPROM_ADDR.Bits.ADDRH5 #define EPROM_ADDR_ADDRH4 _EPROM_ADDR.Bits.ADDRH4 #define EPROM_ADDR_ADDRH3 _EPROM_ADDR.Bits.ADDRH3 #define EPROM_ADDR_ADDRH2 _EPROM_ADDR.Bits.ADDRH2 #define EPROM_ADDR_ADDRH1 _EPROM_ADDR.Bits.ADDRH1 #define EPROM_ADDR_ADDRH0 _EPROM_ADDR.Bits.ADDRH0 #define EPROM_ADDR_ADDRL7 _EPROM_ADDR.Bits.ADDRL7 #define EPROM_ADDR_ADDRL6 _EPROM_ADDR.Bits.ADDRL6 #define EPROM_ADDR_ADDRL5 _EPROM_ADDR.Bits.ADDRL5 #define EPROM_ADDR_ADDRL4 _EPROM_ADDR.Bits.ADDRL4 #define EPROM_ADDR_ADDRL3 _EPROM_ADDR.Bits.ADDRL3 #define EPROM_ADDR_ADDRL2 _EPROM_ADDR.Bits.ADDRL2 #define EPROM_ADDR_ADDRL1 _EPROM_ADDR.Bits.ADDRL1 #define EPROM_ADDR_ADDRL0 _EPROM_ADDR.Bits.ADDRL0 #define EPROM_ADDR_ADDRH75_MASK 32768 #define EPROM_ADDR_ADDRH6_MASK 16384 #define EPROM_ADDR_ADDRH5_MASK 8192 #define EPROM_ADDR_ADDRH4_MASK 4096 #define EPROM_ADDR_ADDRH3_MASK 2048 #define EPROM_ADDR_ADDRH2_MASK 1024 #define EPROM_ADDR_ADDRH1_MASK 512 #define EPROM_ADDR_ADDRH0_MASK 256 #define EPROM_ADDR_ADDRL7_MASK 128 #define EPROM_ADDR_ADDRL6_MASK 64 #define EPROM_ADDR_ADDRL5_MASK 32 #define EPROM_ADDR_ADDRL4_MASK 16 #define EPROM_ADDR_ADDRL3_MASK 8 #define EPROM_ADDR_ADDRL2_MASK 4 #define EPROM_ADDR_ADDRL1_MASK 2 #define EPROM_ADDR_ADDRL0_MASK 1 EPROM_ADDRSTR _EPROM_ADDR1; #define EPROM_ADDR1 _EPROM_ADDR1.Word #define EPROM_ADDR1_ADDRH _EPROM_ADDR1.MergedBits.ADDRH #define EPROM_ADDR1_ADDRL _EPROM_ADDR1.MergedBits.ADDRL #define EPROM_ADDR1_ADDRH7 _EPROM_ADDR1.Bits.ADDRH7 #define EPROM_ADDR1_ADDRH6 _EPROM_ADDR1.Bits.ADDRH6 #define EPROM_ADDR1_ADDRH5 _EPROM_ADDR1.Bits.ADDRH5 #define EPROM_ADDR1_ADDRH4 _EPROM_ADDR1.Bits.ADDRH4 #define EPROM_ADDR1_ADDRH3 _EPROM_ADDR1.Bits.ADDRH3 #define EPROM_ADDR1_ADDRH2 _EPROM_ADDR1.Bits.ADDRH2 #define EPROM_ADDR1_ADDRH1 _EPROM_ADDR1.Bits.ADDRH1 #define EPROM_ADDR1_ADDRH0 _EPROM_ADDR1.Bits.ADDRH0 #define EPROM_ADDR1_ADDRL7 _EPROM_ADDR1.Bits.ADDRL7 #define EPROM_ADDR1_ADDRL6 _EPROM_ADDR1.Bits.ADDRL6 #define EPROM_ADDR1_ADDRL5 _EPROM_ADDR1.Bits.ADDRL5 #define EPROM_ADDR1_ADDRL4 _EPROM_ADDR1.Bits.ADDRL4 #define EPROM_ADDR1_ADDRL3 _EPROM_ADDR1.Bits.ADDRL3 #define EPROM_ADDR1_ADDRL2 _EPROM_ADDR1.Bits.ADDRL2 #define EPROM_ADDR1_ADDRL1 _EPROM_ADDR1.Bits.ADDRL1 #define EPROM_ADDR1_ADDRL0 _EPROM_ADDR1.Bits.ADDRL0 #define EPROM_ADDR1_ADDRH75_MASK 32768 #define EPROM_ADDR1_ADDRH6_MASK 16384 #define EPROM_ADDR1_ADDRH5_MASK 8192 #define EPROM_ADDR1_ADDRH4_MASK 4096 #define EPROM_ADDR1_ADDRH3_MASK 2048 #define EPROM_ADDR1_ADDRH2_MASK 1024 #define EPROM_ADDR1_ADDRH1_MASK 512 #define EPROM_ADDR1_ADDRH0_MASK 256 #define EPROM_ADDR1_ADDRL7_MASK 128 #define EPROM_ADDR1_ADDRL6_MASK 64 #define EPROM_ADDR1_ADDRL5_MASK 32 #define EPROM_ADDR1_ADDRL4_MASK 16 #define EPROM_ADDR1_ADDRL3_MASK 8 #define EPROM_ADDR1_ADDRL2_MASK 4 #define EPROM_ADDR1_ADDRL1_MASK 2 #define EPROM_ADDR1_ADDRL0_MASK 1 #endif